1. Field of the Invention
The present invention relates to a semiconductor device with a wiring structure having good electrical properties in a connection with a capacitor that uses a metal-oxide dielectric.
A ferroelectric random access memory (FeRAM) is a high-speed nonvolatile memory using the hysteresis property of a ferroelectric material. A FeRAM has excellent features, such as high-speed read/write operations that are as fast as a dynamic random access memory (DRAM) and lower power consumption, for instance.
When a capacitor is formed with a ferroelectric material of a metal oxide, an annealing treatment in an oxygen atmosphere at a high temperature (600-800 degrees Celsius) is required to recover the properties of the ferroelectric material after sintering or etching. Because of this, precious metal such as platinum (Pt) or iridium (Ir) having excellent oxidization resistance properties is used for the upper and lower electrodes adjacent to a ferroelectric. Especially, Pt is best used for the electrodes in consideration of process-stability and workability.
Japanese Patent Publication JP-A-10-256503 (especially pages 5-8 and FIG. 1) shows a semiconductor device with a ferroelectric capacitor. In this semiconductor device, aluminum (Al) and Pt are used for the main wiring material and the main electrode material, respectively. In general, it is known that Al and Pt excessively yield chemical reactions. A void is formed in an Al wiring in these chemical reactions. Also, if much chemical reactions are provoked, the Al wiring pattern will be separated. Therefore, an anti-reaction layer is formed on a capacitor electrode in order to prevent chemical reactions between Al and Pt.
2. Background Information
As described above, Pt, which is used for an electrode material of a ferroelectric capacitor, chemically reacts with Al, which is a general wiring material, and an Al2Pt compound is produced. As a result, a void is formed in Al wiring. Also, if a large number of chemical reactions are provoked, the Al wiring pattern will separate. Therefore, it is common to form a barrier film such as titanium nitride (TiN) between a Pt electrode and the Al wiring. However, the crystal structure of TiN is a columnar crystal structure. Therefore, Al atoms can easily spread through the crystal grains of TiN to a surface of the Pt electrode. One of the countermeasures for this could be to improve the barrier properties by lengthening the diffusion path of Al by forming a thick TiN film. However, if a thick TiN film is formed with a method such as sputtering, an overhang growth of TiN will be enhanced on a contact hole used to connect a capacitor electrode with wiring. Also, Al, a wiring material, cannot be implanted into a contact hole sufficiently. Therefore, deterioration of the electrical properties will be provoked. Thus, a sufficient barrier effect cannot be obtained just by forming a TiN barrier film on an interface between a Pt electrode and Al wiring.
The semiconductor device described in Japanese Patent Publication JP-A-10-256503 includes an anti-reaction layer between the Pt electrode and the Al wiring of a capacitor. In other words, it includes a barrier layer, a stopper layer, and an adhesion layer. However, this anti-reaction layer is formed on a capacitor electrode, and integrated with a capacitor electrode. Therefore, the thickness of the electrode itself can be increased, and eventually the thickness of the whole semiconductor device structure can be increased. Also, in this semiconductor device, a contact hole used to connect a capacitor electrode with wiring is etched after the anti-reaction layer is formed. However, the dielectric film is damaged in this etching process. Therefore, an anneal in an oxygen atmosphere at a high temperature is normally conducted to recover the properties of the dielectric film, although this is not described in Japanese Patent Publication JP-A-10-256503. However, there is a possibility that the anti-reaction layer already formed will be oxidized, its electrical properties will be reduced, and the anti-reaction layer will be separated in this anneal treatment. Also, in this semiconductor device, a stacked capacitor structure is employed, and an anti-reaction layer is formed only on an upper electrode of a capacitor. If a contact needs to be formed upward from both upper and lower electrodes of a capacitor, an anti-reaction layer needs to be formed for a lower electrode. However, forming an anti-reaction layer for a lower electrode is not described in this patent publication.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved method for manufacturing a semiconductor device. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.